WebFPGA is a cloud-based development environment for FPGAs with compatible development boards. Our software toolchain uses a recent browser technology called WebUSB to program the FPGA, without any software required other than a modern web browser (Chrome/Opera/Edge75 supported for now). We also provide a browser-less, command-line solution.
We plan to open-source all of our hardware designs. View our cloud IDE here: https://beta.webfpga.io.
We're fully compatible with IceStorm/iCECube in offline workflows! Check out the update: https://www.kickstarter.com/projects/ryanmjacobs/webfpga-rapid-fpga-development-system/posts/2537234
**Stretch Goal Announced** Scroll down for details!
**International Shipping** Send me a direct message or email (email@example.com) if your country is not listed in your pledge reward — we have to manually add each country.
From the second you receive our board, you will be able to plug it in, synthesize Verilog, and flash it. NO SOFTWARE REQUIRED!
If we exceed $24,000 in funding, all FPGA Kits will be upgraded! Each kit will receive an additional RGB Neopixel LED Strip and Seven-Segment Display. That's right, each kit will come with two of each! — in addition to the other three companion boards, of course. These modules are chainable, so you can effectively have an 8-digit seven-segment display or a 16-long individually addressable RGB LED strip.
If you have already backed WebFPGA, don't feel obligated to increase your pledge. We appreciate every existing contribution. This is just a little extra kick for those interested. Also, consider upgrading from a standalone device to a kit. We have been hard at work polishing our Verilog standard library, which works out of the box for each companion board.
Here is a close-up of the chainable IO pins. The inputs are on the left-hand side and additional modules are chained on the right-hand side. "DI" denotes "Data Input" and "DO" denotes "Data Output". (Note, these two modules are not intermixable. Neopixel strips can only be extended with Neopixels strips, and Seven-segment Displays can only be extended with Seven-Segment Displays.)
Who are we?
This endeavor was conceived and developed by:
- Mick Jacobs - Hardware Lead (previously an ASIC Manager at Cisco Systems)
- Ryan Jacobs - Software Lead (student at UCLA, Computer Science & Engineering)
What’s an FPGA?
(If you’re already familiar with FPGAs and their use cases, you should skip this section.)
FPGA is an acronym for “Field Programmable Gate Array”. In essence, the “field programmable” isn’t too relevant other than implying that the whole “gate array” is programmable. The “gate array” is the cool part. Think of the whole chip as an array of logical gates (e.g. AND/OR/etc). These logic gates can be wired up however you may desire. For example, you might decide to write some logic that tints an entire image red. On a CPU, each pixel would need to be tinted one by one. But in digital logic, each pixel can be tinted simultaneously. Microcontollers, CPUs, GPUs, etc. consist of logical gates solidified into an integrated circuit at a silicon foundry. However, with FPGAs, these gates can be reprogrammed on the fly. FPGAs are used to develop specialized, dynamic digital logic systems.
If you would like to learn a little bit more about Verilog and FPGAs, checkout this brief introduction we've made: https://youtu.be/VjklURLUXHo. It's aimed at people coming from a software rather than hardware background.
We also plan to write a series of easy-to-read blog posts to make learning digital logic as approachable as learning traditional software programming. Read the first one here! https://blog.webfpga.io/2019/03/02/sr-latches/
Until recently, FPGA development has suffered from a high barrier to entry for newcomers. In the past, development boards using Xilinx, Lattice, and Altera chipsets easily fetched $250-$2000 price tags. The hardware barrier has been all but eliminated by recent entrants, which include MojoBoard (https://alchitry.com/products/mojo-v3), the IceBreaker (https://www.crowdsupply.com/1bitsquared/icebreaker-fpga), and TinyFPGA (https://tinyfpga.com/) who offer sub-$100 kits.
However, despite the hardware barrier being dramatically lowered, the required software to develop on these systems is still “hefty”. The Xilinx and Lattice environments easily exceed 30 GB installs. Additionally, due to its nature, synthesis (place & route) is a computationally intense task. Lightweight student laptops (such as Macbook Airs or Chromebooks) cannot adequately supply the necessary raw processing power. Not only this, but most toolchains do not support all operating systems equally.
With WebFPGA, educators could teach a classroom of high-school students with nothing more than a Chromebook per kid. In fact, some modern smartphones support WebUSB too!
We aim to completely revamp the digital logic development experience. Our cloud-based toolchain performs synthesis on our backend, forwarding the logs and final bitstream to the client for flashing. Local CPU expenditure is zero.
WebFPGA is a remote wrapper around these powerful and complex toolchains. Simply feed it your hardware description in Verilog source files and about a minute later it will return a synthesised bitstream, ready for flashing! (VHDL will be supported in the future).
Our backend is comprised of a network of self-hosted Kubernetes orchestrations. Our nodes are a mix a of self-hosted and remote bare-metal machines. We are selling our hardware to fund the backend. So, all backers will receive a full, lifetime membership to our software.
Read our FAQ for more information on our business model, compatible toolchains, and support plan.
For our launch, we allow any anonymous user to synthesize Verilog on our website. However, in the future, we will require users to create an account to synthesize code. This protects us and ensures that paying customers will have always have adequate resources.
A certain subset of developer culture avoids GUI IDEs like the devil… which is why we provide a separate CLI toolchain. The CLI toolchain integrates flawlessly into the *nix-style workflow (Git, Make, and friends). In the near future, we will have an official release for the toolchain.
Our software is currently in a beta state. We will remain in beta for one month after our funding ends. Our boards are fully functional with the beta site, however there are some user features that we still plan on developing. For participating in our beta, you will be rewarded with a full membership to our platform. Our beta roadmap includes:
- A pristine standard library, including modules for the on-board RGB LED, button debouncing, standard SPI/I2C interfaces, etc.
- User accounts and file saving
- A Verilog module community (think NPM, but for Verilog) that allows users to seamlessly share and integrate code
- Online simulation and waveform viewing
Don’t get us wrong, as a software student and a member of the industry, we understand the fear of vendor lock-in. That is not our goal. Please note that our boards are fully functional without our software — the Lattice IDE is free to download and can work independently of our toolchain. (The open-source toolchain IceStorm is also compatible with our chipset.) If we ever decide to end official support, we will open-source our entire backend.
All backers of our campaign will receive a lifetime membership to our cloud-based toolchain at no additional cost.
Additionally, all components of our hardware stack are user-programmable. We encourage power-users to reprogram our on-board microcontroller and discover interesting use cases.
- 4-IO bridged communication between MCU and FPGA
- On-board Neopixel RGB LED
- User button
- Reset button
- User Single-Color LED
- On-board precision clock oscillator
- Lattice iCE40UP5k FPGA
- 39 IOs (32 accessible)
- 5280 logic cells
- 1 Mbit SRAM
- 120 Kbit Block RAM
- Hardened SPI/I2C macros
- 10 Khz & 48 MHz internal oscillator
- On-board PLL & DSP functions
- STM32F04-Series MCU
- WebUSB interface
- Fully user-programmable
- 48 MHz internal clock
- 32 KB flash
- 6 KB RAM
- 16 Mbit shared flash
We can synthesize logic to produce 8-bit audio for Star Wars utilizing less than 6% of the logic cells in our FPGA!
As you might have noticed on our cloud IDE, there are four buttons on the left toolbar labeled "BTN1", "BTN2", etc. These buttons are referred to as input wires "WF_CPU1", "WF_CPU2", etc. because they actually stem from the on-board microcontroller. These are a godsend for debugging. You can simply include them into your top-level module and when you click on the in the IDE, they will respond accordingly. This example simply uses BTN1 to toggle the state of the on-board LED.
In addition to our standalone board, we are selling a kit that comes with 5 compatible companion boards. All of these boards have working example code on our website.
8-LED RGB Neopixel Strip
RGB LED Matrix
8 Slide Switches, Directional Joystick, Controllable Bi-Color LEDs
This board accepts I2S signals and produces analog audio output.
Commitment to OSH
All of our hardware schematics will be published in PDF format.
Risks and challenges
The involved risks are minimal. We already have fully functional boards and are well beyond the prototyping phase. Our website is functional as well. The website and command-line tools are capable of synthesizing and flashing our boards. However, there are a number of features that we would like to offer, such as the ability to save files online, a simulation framework and waveform viewer, and a more comprehensive standard library. With funding, we will be able to focus our efforts full-time towards perfecting features.
Help us revolutionize the hobbyist and student FPGA ecosystem!Learn about accountability on Kickstarter
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