Ripping the band-aid off
As a bit of background -- pytey proposed we do this project a couple of years (!) ago now, and based on my experience with board layout and assembly in China, I (bushing) agreed. pytey wanted to support local businesses in Hungary, and he said he could get us a good deal on assembly there. I would design the board. He would have PCBs fabbed, collect the parts, have them assembled, and then distribute them to European backers; I would then distribute the boards to the North American backers.
Now it's 2013. I have not been able to get ahold of pytey for almost two months; when I talked to him last, he was undergoing a lot of turmoil in his life and couldn't fully participate in this project (something that has been true for months and months at this point). Unfortunately, he has a stockpile of parts for our OV2 design, as well as a good chunk of the Kickstarter money.
This leaves me in a difficult situation -- I do not have control of enough of the parts to make more of the OV2 design, and I do not have control of enough of the money to return it to the backers. I have been waiting for pytey to come back so we could finish the project by making the OV2 boards, but this no longer seems realistic. The only solution I can come up with is to redo the design one more time, using entirely parts that I can buy off-the-shelf with the money I have access to.
I believe that we can produce the promised product with a much simpler design, based around a Xilinx Spartan6 FPGA with an FTDI USB FIFO (FT2232H or maybe FT232H). I have already started on the design, here is an unfinished version of it so you can see where I am with it:
https://dl.dropboxusercontent.com/u/694931/ov3_draft1_altium.zip (hardware design files in Altium format)
I do not feel comfortable making any promises at this point about time; my plan is to have 10 PCBs made in China (with my own money) and to hand-assemble a couple of them so that some friends can help me by writing the HDL for the FPGA. As we write the HDL, we may discover that we need to change the design to accommodate it and improve manufacturability; this may mean we need to respin the boards once or twice. Once we have working HDL on a working board, I will then be able to have the boards assembled by a CM in China so I can send them out, as promised.
At this point, this is the last shot the project has at succeeding; the remaining funds are just barely sufficient to cover manufacturing this design without spending any money beyond what is strictly necessary. However, I have hope that by driving what's left of the project forward myself I can ensure that steady progress is made.
TL;DR shit went bad, trying to fix it
P.S. If you want to see the OV2 design, it's here (design files in Altium again):