Use this space to cheer the creator along, and talk to your fellow backers.
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Thanks bushing! The hard work is much appreciated and I can't wait to put the analyzer to use..
Appreciate the reply. Look forward to further updates.
We'll be posting an update soon, but we have made great progress and the core team are working on the firmware while the next prototype board design are being readied for manufacturing.
The project has been far more involved and complicated than we imagined and as we have mentioned in previous updates we had some issues with hardware problems, these have been rectified now and we are moving onto the next design.
There is a reason why tools that are on the market currently cost $LOTS (because of the huge amount of R&D that has to happen) and all of those analysers don't have as many features as the OpenVizsla will, so that has to be taken into account.
We know that the device you'll eventually receive will be used not only for USB analysis but for a host of other analysis jobs, we know it will be the go to device, not only for an Open Source device, but it will be chosen again and again over commercial devices that you may have in your lab.
We can't give a concrete date on shipping as yet as we don't have the next boards back and those have not been tested and we don't want to let anyone down with false promises.
We are working on this night and day (while also fitting in time for our day jobs).
An update and come concrete dates on when you will be shipping would be good. Has anyone had anything out of this project yet?
I am hungry for an update. The last update (In Jan) had some very promising news and I am just wondering how far it has progressed since then?
@jetdillo Well, before the end of *a* year.
"Would be great to get an update on progress though. I don't think that is unreasonable for backers to expect an update once a month!"
So, with the first anniversary of this project coming up, I was hoping we could get an update ?
Can mid-tier backers expect to see their units before the end of the year ?
Hi, hope it is all going well with the project. Would be great to get an update on progress though. I don't think that is unreasonable for backers to expect an update once a month! Cheers.
Hi, I did not expect that this proejct would take so long....looking forward to get one board and be able to do something. Thanks.
djmdjm: We posted an update a couple of days ago, maybe you missed it? You can see it in the updates tab above.
Could you please make another update? It has been a long time and we backers would love to know how things are going.
Would love an update as well
Anything going on with this project? Is there some other place updates are being released? For those of us who aren't receiving prototype boards it's a little quiet.
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Any news regarding the developement of OpenVizsla?
It seems to me that you should give us some more info regarding it: last update was made on July, 7!!!!
OK, so what's up with this project? Is July 10th really the last contact? Who got some of these initial boards?
time for another update I think.
Eric: As stated in the update "*certain* development headers will be removed".
We really went overboard and had JTAG or Debug headers on every programmable component on the board so that we could ensure the board wasn't bricked during early development of the debug CPLD. Those parts now appear either directly in the JTAG chain or are muxed by the CPLD (which is available by the on board FTDI JTAG debugger or an external 20-pin connector).
My experience is that removing development headers is *always* a bad idea. Every time I've worked on a project where we thought we no longer needed them, we found that we actually did. Management often would tell us, "you can use the old boards for development/debugging", but for one reason or another that never worked out well.
I'd strongly recommend keeping any development/debug headers, and simply not stuffing them. If you must reduce the board space, you could go to fine-pitch headers.
Thanks for the update! Looking good!
@Eric I've just written an update. Thanks for the nudge!
It's been over 7 weeks since the last update. Surely there has been some progress to report? I know these things take time, but even a minor update would be help keep us backers confident that things are moving toward fruition.
For those of us who missed out on backing, will there be any units for sale after completion?
@bushing: just to let you know this is one of the most professional projects I've backed so far (and I've backed more than 10 on Kickstarter). Your communication flow is steady, and the balance between "user's participation" and "creator's vision" is dead-on. Just take the time you need to do it right and you'll be doing a HUGE service to the community of makers around the world. Thanks for doing this.
@smokeymcpot We are managing this project in our particular way and in the way we stated when we asked for backing. There is a lot of work to do and unfortunately we can't manage huge amounts of feature requests from everyone (which usually happens when there is a large forum for a project like this). If you look through the comments we have added features based on the requests of users, but even this was feature creep that added complexity to our existing design that we had sketched out. We have to keep the board design and review process fluid and lean and we certainly have enough peer review within our team (of highly experienced embedded and EE experts).
The upper tier was priced high enough to cover 2 or 3 of the prototypes per person (they are incredibly expensive in the small numbers that we are producing and to be honest 1000 USD doesn't really cover this), the backers knew what they were getting into when they opted to back this tier and they are all happy, every single person who has backed us (from $1 to $1500) are all people who are passionate about the project and believe in us.
By the way we also put out a request for students and other people who couldn't afford to back anything, we asked them to describe what they do and why they'd like to help and we've also sponsored those spots for them. We think we are doing this in the right way and it is working for us, but of course feel free to start another USB protocol analyzer project on Kickstarter (or elsewhere) that completely fits all of your Open Source criteria.
I understand this is not your average Arduino project. Being an electrical engineer who works with programmable logic design on complex multi-layer boards with small pitch SMT components, I both respect and appreciate the amount of work that you are doing to get it together. The vast majority of people interested in this project probably don't care about the design at the board level let alone have the experience or equipment necessary to build and test a prototype. They just want something that works. The other small minority could have valuable input. It never hurts to have an extra pair of eyes on the design process, which is one of the best things about open source.
You are right about the reason there are no cheap analyzers out there now, but if you are going to develop with a small team and keep the design process closed, why release the hardware files at all? Just sell boards. Having to pay to have access to design conversations is not very "open source".
@smokeymcpot as we originally stated in the project summary "With your investment in our project, we will finalise the design, order the components in bulk (so that automated assembly is viable) and we will have initial prototypes built."
There is a reason there are not any cheap high-speed USB Protocol Analyzers out there (let alone open-source) and this reason is because the hardware development is specialised, expensive and putting it all together is very time consuming. This isn't a run-of-the-mill Arduino project or but a high-speed, SMT four-layer PCB design with various specialist components that need to be designed and produced correctly. This is the task that is underway right now, this is a board that has to be designed carefully and with the input of a few talented engineers (including ones in the highest tier). When the hardware is proven and the board is "brought up" then we'll work on the firmware and software and accept valid software contributions from anywhere. We've got a community (a mailing list and group) that is currently open to backers, this will be extended to the public once we've proven the hardware. I notice that you are not actually a backer, so you'll need to wait a little while longer to see these conversations.
First of all I would like to say I fully support the goals of this project. The technology to cheaply make very useful equipment like this really is now within the grasp of normal people for a lot of applications. I do have a question/comment about the "open source" nature of this project though. The power of open source isn't just having the finished schematics/layouts/code available, but also the collaboration of the community working on the design. It appears that you are developing the system yourselves without having the design available. There are many talented people with experience in relevant fields that would contribute to making the best design if they had access to the design in progress. I may be way off base and just missed the link to the git/svn/cvs repository, but if that is not available, this project is really stretching the idea of open source. Take the lead from Linux kernel. Linus makes the final decisions about what gets included, but anyone can contribute.
@bushing Have you had a look at http://www.elinux.org/BeagleBoard/GSoC/2010_Projects/USBSniffer ?
It is not a FPGA, so will not work at the speed you are designing, but it does work today.
Just to let you know
@Seth Thanks for the comment, it is an interesting point, hopefully I can explain how the current solution is engineered and also the reason why your suggestion isn't that easy for OpenVizsla.
The target USB ports need to be as close as possible to the analysis PHY and because of the high speed signals involved, the PHY has to be strategically placed so that the sniffed signals degrade as little as possible. This is achieved this by placing the USB PHY chip as close to the target ports as we can (and also ensuring that USB traces are not crossed in any way).
The PHY is mounted on the underside of the PCB so that the PHY traces are as short as possible.
All of this means you can't introduce additional electrical connections (such as a USB socket daughterboard) without relocating the PHY onto that same daughterboard (which would be expensive). The PonyPort could accommodate such a board (and is actually designed to do so for test purposes) but it would drastically increase costs if we adopted that configuration for end-users.
This may fall into the realm of overengineering, but coming from using other commercial USB analyzers, one of the biggest issues I've had is with USB connector cycle life. That is, the USB connectors on the analyzer failed only after about a year of use due to the large number of cycles and heavy use it was taking. I always thought it would be a better design to have easily-replaceable USB connectors so if a connector fails due to heavy use, it can be easily replaced (i.e. via a snap-in daughterboard or at he very least, making it easy to desolder (though that could certainly damage the board or other nearby components)). What do you think?
@bushinng - Thanks a lot, can't wait to see the final design!!! Unfortunately i came across your project when the funding was already over so I couldn pledge :/ Anyway thanks again for the efforts you and your crew are putting into this project, keep going!!!!!
@Eugenio - There is a mailing list and community that is currently open to backers, anyone who backed the project (no matter how large or small the contribution) was invited. This will be extended to the public, but right now we are finishing the PCB design and ordering the prototype boards.
Are there any new updates? The blog is stuck un the same post since January the 9th and yet no link to a forum has shown up on www.openvizsla.org. Anyone knows anything?
@bushing - I'm at $250 but will help with Mac OS X implementation for the odd early prototype.
Congratulations on x>70,000 hopefully we can shoot for towards/past 80,000 before the end of the day. This will be a fun and exciting project to help and support in the coming new year. Developing an open sourced anaylzer which will open doors to so many hidden proprietary USB treasures for reverse engineers is no easy feat. So good luck to all supporting this effort, pledge what you can and lets break down that pesky USB barrier. :)
@bushing - Thanks for the clarification. I've upgraded to $150 Funding level as a result. I would have liked to have tried my hand at reflow soldering, but probably best I don't for a 5 layer (?) PCB board.
@Peter Sorry, let me just clarify that for you (the wording is a little ambiguous) all PCBs (populated/assembled or not) that will be sent out will be the final, bug-free versions, only the $1000 backers get access to the initial bleeding-edge development boards.
On the matter of upgrading to the $150 backer level. The $100 level provides 'a final OpenVizsla PCB and kit of surface-mount parts to build their...'. The $150 level provides 'a bare-bones OpenVizsla board from our initial production run". Having a final pcb and a set of parts seems to me to be better then having an 'initial production run board'. I would think that bugs would be addressed in the final pcb which the 'initial production run board' might have some undocumented features. Perhaps it's a symantec thing, but that's how I read it.
Same here, Jacques. I'm in for $150 after reading the hackmii post. :)
I'm glad you post it on hackmii.com, I would miss this otherwise! Can't wait to work with mine!
I don't mean to rush you guys, I'd just like to know if it's to soon to schedule a intern student to work with an openvizsla from the first run in February?
@Peter Yes you could! Thanks for the link.
Could the reflow soldering technique be utilized ?
The January 2011 QST had a article on turning a toaster oven into a reflow soldering oven.
@Bertrand No, there is a CPLD that will be there for the configurable routing of some debug signals. In theory it means we can route JTAG from anywhere to anywhere, same with the serial debug connections etc. The entire thing can be bypassed by jumper wires anyhow.
Do you mean that the FPGA will be replaced by a CPLD XO2 ?
I'm writing my diploma thesis regarding crowdfunding and I'm urgently looking for interviewpartners which financed or funded a project.
Please write me at Facebook or firstname.lastname@example.org if you would have time for a skype interview.
Many thanks in advance,
I officially jumped to the $500 level, awesome to see everyone doing so well! I did my best to petition the EFF but they said they're not a granting organization. I again ask if there are any other supporters here to write them an email. I didn't think to mention the $2000 dollars they got as a donation for someone writing a driver for the Kinect. I'd love to see the EFF logo on the board just because this type of project is something that is right up their alley.
On another note do you guys need any help writing file format converters or anything like that? Something that converts your native capture format into the format that some of the existing software packages might use?