The Parallella Roadmap
As Moore's Law slows down, silicon real estate efficiency will become a dominant concern and the most efficient architecture will always win in applications that put a premium on cost and energy efficiency.(most applications) Today's Epiphany chips are very small and can be EASILY scaled up to very large array sizes that would be very competitive with any high performance chip.
Here is Adapteva's road-map for the Parallella project over the next ten years. The road-map is based on the Epiphany-IV 28nm chips that have been tested in the lab since July,2012 and take into account semiconductor process technology scaling and incremental technology improvements. The 2013 and 2014 chips will use the same 28nm process that the current 64 core chip was designed in. We have been doing chip design for 15 years and feel comfortable with the path. If you disagree PLEASE tell us why our plan isn't possible or practical, but do come ready with data, not opinions:-)