Image by NASA (I altered to remove NASA LOGO), and the moon background of the thumbnail logo is also by NASA.
This project is not affiliated with or endorsed by NASA.
Colonization of outer space is a large goal which can be broken into many smaller goals. Before colonizing other solar systems we will colonize our own. Humans will need many things to live on the Moon and prior to sending people it would be wise to have those things waiting already built and functional. But even before building on the Moon a mission needs to get to the Moon. This requires a CPU capable enough to run artificial intelligence to control the navigation but also radiation tolerant so that it isn't damaged by radiation during its voyages.
In the long run, the best way to lower cost is to build the entire spacecraft in outer space using robotic manufacturing. This eliminates the cost of launch and the cost of the materials that can be mined and manufactured in space. But many parts of a spacecraft currently cannot be built in outer space because they are far too complicated. Manufacturing a 1 million gate 32 bit CPU in space is incredibly difficult and could be made much easier by designing a much smaller 32 bit CPU with far fewer gates. This project is about building that CPU design in a FPGA and presenting the final output as part of the "outer space colonization" team entry in the NASA cube quest challenge.
I am an electrical engineer with 15+ years of experience at a full time job that I am not planning on quitting. I would like to be involved in outer space colonization primarily as a hobby. I have paid several thousand dollars out of pocket as part of the process of entering the contest but hobbies cost money and space hobbies more than most. I am asking you to help me with my hobby which will develop technology that will make space exploration cheaper, safer, more reliable and above all more radiation tolerant.
I have entered the NASA Cube Quest Challenge starting with GT-2 which involves building a 6U cubesat. But instead of buying special space certified parts I am opting to design all or nearly all of the cubesat from normal parts so I can keep costs down and also make whatever small improvements or customizations best fit the goal of colonization and spacecraft that can be manufactured more easily in outer space even if the added burden makes it impossible to complete the contest in time.
Nasa will have rights to copy my designs as part of the contest rules but I will retain the ownership and because that may be valuable I won't be telling you exactly HOW I intend to simplify or how much I think I can improve on the current designs. But I am willing to build an ENTIRE CPU because I think I have a simpler and more redundant way to do it. The key here is simpler. Radiation damages a CPU in proportion to the volume which is proportional to the technology used and the gate count. If the gate count is 10 times smaller and the technology is the same then you could expect to be 10 times more tolerant to a radiation environment all else being equal.
If multiple CPU cores are doing the same calculation and are far enough apart that a single event cannot upset all cores it is possible to be single event upset immune for events that do not permanently damage the hardware. If multiple parts of the CPU are redundant and vote on a common outcome it is possible for a three core CPU with all three cores damaged in three different areas to still have a functioning CPU even though all cores have individually failed. The architecture is very important.
Using a programmed FPGA will likely be less radiation tolerant than a pentium for this current mission on first generation hardware. That is because the pentium performs very well. This is partially due to the technology used to fabricate it being small in size and may be partially due to luck. A COTS FPGA even an anti-fuse FPGA is not inherently radiation hardened and even if it is fabricated using the same technology may be more susceptible to radiation damage due to how it is put together not being as lucky. If the FPGA fails due to radiation it will likely cause the S.M.A.R.T. CPU programmed into it to also fail. But demonstrating a working CPU with redundancy and far fewer gates will demonstrate a proof of concept design which may prove interesting to NASA in the future. Or Nasa may find it uninteresting but if the idea has value it will eventually find a home in space.
The Cube Quest Challenge is about communicating fast. The contest rules involve 32 bit multiplication and 32 bit addition as part of the randomization of the data to be transmitted. So for every 32 bits of data sent there will be at least one 32 bit integer multiply and one 32 bit integer addition. So the contest is one part communication test but also one part processor speed test. Because the S.M.A.R.T. design will be running on a much slower clock and using a slower architecture it will require multiple configurable Arithmetic Logic Units (A.L.U) so that multiple streams of data can be mixed together to increase the theoretical data speed back to a competitive level.
Absent unforeseen difficulty I will be using a Common Off the Shelf Anti-Fuse FPGA from MicroSemi with the specific part being chosen after the number of cores is determined and the final design is ready. I believe anti-fuse FPGAs represent the best radiation tolerance of any non ITAR controlled FPGA parts. The long term goal outside the scope of this kickstarter campaign is a custom manufactured ASIC using radiation tolerant design practices and then radiation hardened to be more radiation immune than the parts NASA is using now. If I am lucky the 1st generation S.M.A.R.T CPU may be in the 150 krad total ionizing dose region depending on how the underlying FPGA performs. The 2nd generation custom ASIC S.M.A.R.T. CPU function should have a total ionizing dose in the Millions of Krads and should be functionally immune to single event latch up and single event upset. There has recently been a great deal of progress in memory architecture MRAM, FRAM etc. that is radiation resistant and having a complete computer system that is reliable for decades of radiation exposure would transform the cubesat industry and vastly lower the cost of quality space exploration.
Any funds raised will be applied to engineering activity related to colonizing outer space and the engineering hardware necessary to do that starting with the S.M.A.R.T CPU design in a FPGA and extending to other projects if the amount of money is larger than this project requires.
I am sorry I don't have stickers, shirts, pictures of you in space and the like. I just don't have time to add PR management to my current work load. I will however provide accounting of how the money is spent for any money that exceeds the target $100. The $100 will be spent on purchasing the FPGAs.
Thank you for your time (and money).
P.S. on different portions of the cube quest challenge not related to this kickstarted campaign I could really use a mentor(s) with a lot of experience in spacecraft detailed design or trajectory design. I have purchased 10-20 books on the subject and done my own research and created a simple GMAT trajectory to deep space so I have some limited understanding of the issues. I need detailed hardware design insight in WHY the common practices evolved and what the penalties are for violating common practice in order to optimize performance differently. I have what appear to be untried/uncommon ideas for other areas of the cubesat design which I may be making into kickstarter projects in the future and having insight into the existing wisdom would be very helpful and would improve the quality of the resulting design. I am especially interested in long duration operation consisting of decades and which otherwise reliable components fail first.
In trajectory design I am interested in orbits/tranjectories that have not up to this date been considered interesting and trajectories that are constrained by the overall system design. An example: start from space further out than the moon at a velocity still captured by Earth's gravity but too high to be captured by the moons gravity. Enter the moon's sphere of influence and be bent by a hyperbolic arc and ejected out towards deep space. Because the object is still within Earth's orbit it will be attracted by the earth and the moon back and provided the initial velocity and angle were correct back to the new position that the moon has traveled to. At this point the slingshot effect of the first moon rondevu should have decreased the relative to earth momentum of the spacecraft and made it have a lower velocity relative to the moon in its new position and possibly now be captured by the moon. Is this kind of ballistic skip capture possible? If so how would I determine the correct entry angle and velocity? If the slingshot is symmetrical so that no change in momentum occurs is it possible to have a stable orbit that repeats this sequence and half orbits the moon and half orbits the earth?
My email for this project is
Risks and challenges
The challenge is time. This S.M.A.R.T. CPU is one of several projects I will be attempting in parallel and the possibility of delay is very high. I have a very simple design prepared but even simple designs can be tricky and I could have many stumbling blocks.
I have not communicated any design information related to this processor to NASA. NASA has not shown any interest in this project. The design decisions that I find attractive may not be attractive to NASA.
It is possible that I will be the only one to benefit from the completion of this project. You may be giving me your hard earned money for me to spend on my hobby which never leads to any improvements in the technology of colonizing outer space.
I am acting in good faith but for $100 I can't promise to change the world. Even at $10,000 there are many examples of smart people failing to do simple things in history. Even if successful the way in which this project changes the world may underwhelm you.
These are the risks as I see them.Learn about accountability on Kickstarter
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